Brutus

Overview of Brutus

Brutus is an experimental FPGA resource provided by the Northwest Indiana Compuational Grid (NWICG) through the Rosen Center for Advanced Computing (RCAC). Brutus currently consists of an SGI Altix 450 with two SGI RC100 blades with two FPGAs each, for a total of 4 FPGAs. Using Brutus effectively requires careful code development in either VHDL or Mitrion-C, but can result in significant performance increases. BLAST has been benchmarked on Brutus at 70x typical general-purpose CPU performance.

Detailed Hardware Specification

Number of Nodes Processor Cores per Node Memory per Node Interconnect
2 Virtex 4 LX200 FPGA 2 80 MB QDR SDRAM NUMAlink Shared Memory

Brutus runs SuSE Linux Enterprise Server 10 and uses Condor for resource and job management. Operating system patches are applied monthly or as security needs dictate.

FPGA algorithms may be serialized, placed, and routed (analogous to compilation) and then registered for use by Brutus jobs from the frontend node portia.rcac.purdue.edu, from which jobs may also be submitted. Mitrionics' Mitrion-C compiler for FPGA algorithm development is provided, as well as Xilinx VHDL tools. Pre-SPRed bitcode may also be used. Some algorithms such as BLAST are provided pre-installed by RCAC.